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A Fast Hardware Implementation of STON Algorithm for Comparing 3-D Structure of Proteins in FPGA
Efficient Buffer Resource Distribution by Buffer Planning in Floorplanning Level to Improve Buffer Usage and Routing Congestion
A Reconfigurable Architecture for Implementing Multiple Cipher Algorithms
A Similarity-Based Framework for Integrated Temporal Partitioning and Physical Design of Reconfigurable Computing Systems
A Specification-Driven Framework for the Floorplanning and Placement of Hierarchical VLSI Designs