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Integration of CTL, PTL, and DCVSL for Designing a Novel Fast Ternary Half Adder
Masoume Bastami • Reza Faghih Mirzaee
Keywords: Half Adder • DCVS • Pass-Transistor Logic • Capacitive Threshold Logic • Ternary Logic • Multiple-Valued Logic • High Speed
Very High Speed Current-Mode Logical Gates
Keivan Navi • Mohsen Kazemi Parsa • Arash Ghorbannia Delavar
Keywords: BiCMOS • multiple-valued logic • VLSI • driving large capacitive load
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