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Novel Designs of Fast Parity-Preserving Reversible Vedic Multiplier
Implementation of Efficient Modulo 2n+1 Squarer for {2n-1, 2n, 2n+1} Based Residue Number System
Novel Quaternary Operator for Cyclic Redundancy Check on Xilinx FPGAs
An Ultra-Efficient Imprecise Adder for Approximate Computing Based on CNTFET
A Novel Methodology for Timing Behavior Recognition of Balanced XOR-XNOR Circuits
A High Speed Mixed Mode 4:2 Compressor
Very High Speed Current-Mode Logical Gates