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Reliability Analysis of Sequential Logic Circuits Using Signal Flow Graphs
A Two-Stage Method for Optimizing the Parameters of CMOS Operational Amplifiers Based on Evolutionary Algorithm
Using Error Compensation for Defect Tolerance of Nano-Systems*
Using Standard HDLs and CAD Tools for the Design and Simulation of Asynchronous Circuits
Improving the Retiming Algorithm to Increase the Clock Speed of Synchronous Circuits
A Survey of Successes and hurdles of Asynchronous Circuits Design