2016
14
1
74
0
https://jcse.ir/article/24
A Comparison-Based Algorithm for Hardware- and SoftwareBased Median-Finding in Signal Processing Applications
0
Finding the median value in a list of numbers is an important computational task that is useful for a variety of problems in domains such as computing, networking, signal processing, and remote sensing. Algorithms with worst-case running times that vary linearly with the problem size are known. As is the case for sorting, however, algorithms with non-optimal worst-case running times but with better average performance for problem sizes of practical interest do exist. We devise one such algorithm based on comparisons, analyze its running time, and experimentally verify its performance for applications with small-to-moderate input lists.
1
10
Behrooz
Parhami
ایران
Saleh
Abdel-hafeez
ایران
Arwa
Damir
ایران
Algorithm
Average-Case Running Time
Computational Complexity
Median
Worst-Case Analysis
http://jcse.ir/ow_userfiles/plugins/base/attachments/5bf26e357d9e0_5bf26e357d853.pdf
Computer Society of Iran
Journal on Computer Science and Engineering (JCSE)
14
1
0
https://jcse.ir/article/25
Improving Space and Time Complexity of the Gap-Greedy Spanner Algorithm
0
Let S be a set of n points in and G be a geometric graph with vertex set S. For a fixed real number t 1, G is called a t-spanner of S if, for all pairs of vertices u, v S, the shortest path in G between u and v is no longer than t|uv|, where |uv| is the Euclidean distance between u and v. In this paper, we present an algorithm to construct the gap-greedy spanner that takes O n time and O n space, and another variant of this algorithm that takes O n time and O n space. We also improve the (theoretical) dilation of the gap-greedy spanner. Moreover, we present some other O n time algorithms to construct the gap-greedy spanner and compare their time complexity with the gap-greedy algorithm in practice. Furthermore, we experimentally compare the running time and some geometric properties of the gap-greedy spanner with the greedy spanner.
1
10
Davood
Bakhshesh
ایران
Mohammad
Farshi
ایران
Geometric Spanners
Gap-Greedy Spanner
Well-Separated Pair Decomposition
Greedy Spanner
http://jcse.ir/ow_userfiles/plugins/base/attachments/5bf26e3f9a6f5_5bf26e3f9a453.pdf
Computer Society of Iran
Journal on Computer Science and Engineering (JCSE)
14
1
0
https://jcse.ir/article/26
Novel Quaternary Operator for Cyclic Redundancy Check on Xilinx FPGAs
0
Cyclic Redundancy Check can be used in computer networks and data storage devices to provide fruitful error detection ability. A novel quaternary operator for CRC application is presented in this paper. The CRC circuit using the proposed operator and also SUM operator are described by VHDL and then Xilinx FPGA is used to synthesize and to perform place and route. Furthermore implementation of CRC circuit on FPGAs using the proposed operator outperforms the same circuit using SUM operator in terms of speed, power and area-efficiency.
1
10
Mahya
Sam Daliri
ایران
Saeed
Sam Daliri
ایران
Ali
Bozorgmehr
ایران
Keivan
Navi
ایران
CRC
MVL
LFSR
Error Detection
Quaternary Operator
FPGA
http://jcse.ir/ow_userfiles/plugins/base/attachments/5bf26e48c0d9a_5bf26e48c0c47.pdf
Computer Society of Iran
Journal on Computer Science and Engineering (JCSE)
14
1
0
https://jcse.ir/article/27
FinFET Based Level Converter for Multi-VDD System Design
0
Low-power design is the most demanding for nanoscale integrated circuits design. Aggressive low-power design to maximize the battery life is a significant challenge especially in battery-powered digital VLSI systems. Multi-VDD design is an effective approach for low power design. However, in these Multi-VDD systems, the existence of voltage Level Converters (LCs) between these different voltage islands is necessary. Deigning low power and low cost LC is a significant challenge to reduce the LCs overhead in multi-VDD systems. In this paper a Single-Supply Level Concreter (SSLC) based on independent-gate FinFET is proposed. In the proposed technique, the back gate of FinFETs is biased for providing multi-threshold voltage (Vt) design in order to reduce the number of required transistors in converting low-voltage input signals and decrease static power consumption. Simulation analyses utilizing 22nm technology model demonstrate a qualified performance of the proposed low area and low power design compared to the other previously published most efficient designs.
1
10
Majid
Moghaddam
ایران
Mohammad
Hossein Moaiyeri
ایران
Mohammad
Eshghi
ایران
Multi-Vt
Low-Power Design
Single-Supply Level Converter
Independent Gate FinFET
Multi-VDD
http://jcse.ir/ow_userfiles/plugins/base/attachments/5bf26e52c44be_5bf26e52c433f.pdf
Computer Society of Iran
Journal on Computer Science and Engineering (JCSE)
14
1
0
https://jcse.ir/article/28
A Novel Homogenous Bus Rapid Transit Model Using Hybrid Petri Nets
0
To better understand the characteristics of three connected vehicles traffic flows that are very common on a Bus Rapid Transit (BRT), in this paper a hybrid Petri-net based controller model be considered with different classical and new mobile stations bus will be proposed based on the information of three BRT buses. The bus moving model will consider in terms of the safe distance, speed, reaction time, and station setup time or delay. The experimental results of our model on different kinds of movement scenarios, show its impacts on significant improvement of distance and speed control with fast reaction time analyzing. These improve especially on mobile station with reduced delay and a good balance on station setup time. Traffic flow will be effectively increased up to 28% by changing classical stations to new mobile ones. This finding provides a possible way to ease traffic on the BRT network with three connected buses by different roles of BRT buses for passenger transport and BRT mobile station for passenger exchange.
1
10
Aminollah
Mahabadi
ایران
Bus Rapid Transit (BRT)
Fluid Stochastic Petri-Net (FSPN)
Mobil Bus Station (MBS)
Bus Controller
Mobile Bus Rapid Transit (MBRT)
Intelligent Transportation Systems (ITS)
http://jcse.ir/ow_userfiles/plugins/base/attachments/5bf26e6090f30_5bf26e6090c77.pdf
Computer Society of Iran
Journal on Computer Science and Engineering (JCSE)
14
1
0
https://jcse.ir/article/29
Reducing Multi-Secret Sharing Problem to Sharing a Single Secret Based on Cellular Automata
0
The aim of a secret sharing scheme is to share a secret among a group of participants in such a way that while authorized subsets of participants are able to recover the secret, non-authorized subsets of them obtain no information about it. Multi-secret sharing is the natural generalization of secret sharing for situations in which the simultaneous protection of more than one secret is required. However, there exist some secret sharing schemes for which there are no secure or efficient multi-secret sharing counterparts. In this paper, using cellular automata, an efficient general method is proposed to reduce the problem of sharing k secrets (all assigned with the same access structure and needed to be reconstructed at once) under a certain secret sharing scheme (S), to the problem of sharing one secret under S such that none of the properties of S are violated. Using the proposed approach, any secret sharing scheme can be converted to a multi-secret sharing scheme. We provide examples to show the applicability of the proposed approach.
1
10
Nasrollah
Pakniat
ایران
Mahnaz
Noroozi
ایران
Ziba
Eslami
ایران
Cryptography
Cellular Automata
Secret Sharing
Multi-Secret Sharing
Access Structure
http://jcse.ir/ow_userfiles/plugins/base/attachments/5bf26e6a2ba35_5bf26e6a2b882.pdf
Computer Society of Iran
Journal on Computer Science and Engineering (JCSE)
14
1