Novel Quaternary Operator for Cyclic Redundancy Check on Xilinx FPGAs

Novel Quaternary Operator for Cyclic Redundancy Check on Xilinx FPGAs

Abstract

Cyclic Redundancy Check can be used in computer networks and data storage devices to provide fruitful error detection ability. A novel quaternary operator for CRC application is presented in this paper. The CRC circuit using the proposed operator and also SUM operator are described by VHDL and then Xilinx FPGA is used to synthesize and to perform place and route. Furthermore implementation of CRC circuit on FPGAs using the proposed operator outperforms the same circuit using SUM operator in terms of speed, power and area-efficiency.

References